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Verification Lecture Notes
- Lecture 1, Sept 9, 2013. VIS, Verilog, transition systems.
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- Lecture 2, Sept 9, 2013. CTL.
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- Lecture 3, Sept 10, 2013. CTL model checking.
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- Lecture 4, Sept 10, 2013. Fair CTL, counterexamples and witnesses.
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- Lecture 5, Sept 11, 2013. Symbolic model checking.
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- Lecture 6, Sept 12, 2013. Linear-time properties.
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- Lecture 7, Sept 12, 2013. Fairness, finite automata.
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- Lecture 8, Sept 13, 2013. Finite automata, Büchi automata.
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- Lecture 9, Sept 13, 2013. Büchi automata.
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- Lecture 10, Sept 16, 2013. Büchi automata, Generalized Büchi automata, LTL.
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- Lecture 11, Sept 16, 2013. SPIN.
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- Lecture 12, Sept 17, 2013. LTL.
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- Lecture 13, Sept 17, 2013. Fairness in LTL, LTL model checking.
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- Lecture 14, Sept 18, 2013. LTL model checking.
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- Lecture 15, Sept 19, 2013. Complexity, BMC.
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- Lecture 16, Sept 19, 2013. LTL BMC, LTL vs. CTL.
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- Lecture 17, Sept 20, 2013. CTL*, bisimulation.
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- Lecture 18, Sept 20, 2013. Bisimulation quotients, simulation.
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- Lecture 19, Sept 23, 2013. Simulation equivalence.
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- Lecture 20, Sept 23, 2013. Timed automata.
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- Lecture 21, Sept 24, 2013. Stutter trace equivalence, stutter bisimulation.
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- Lecture 22, Sept 24, 2013. TCTL model checking.
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- Lecture 23, Sept 25, 2013. Model checking the FlexRay physical layer protocol.
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- Lecture 24, Sept 26, 2013. Clock regions.
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- Lecture 25, Sept 26, 2013. Clock zones.
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- Lecture 26, Sept 27, 2013. Deductive verification: partial correctness.
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- Lecture 27, Sept 27, 2013. Deductive verification: total correctness.
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- Lecture 28, Sept 30, 2013. First-order logic, first-order theories.
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- Lecture 29, Sept 30, 2013. First-order theories, quantifier elimination.
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- Lecture 30, Oct 1, 2013. Quantifier elimination.
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- Lecture 31, Oct 1, 2013. Congruence closure.
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- Lecture 32, Oct 2, 2013. Congruence closure, Recursive Data Structures.
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- Lecture 33, Oct 4, 2013. Nelson-Oppen method.
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- Lecture 34, Oct 4, 2013. SLAB.
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Background reading material on Bounded Model Checking (BMC): Bounded Model Checking by Biere/Cimatti/Clarke/Strichman/Zhu,
A Survey of Recent Advances in SAT-Based Formal Verification by Prasad/Biere/Gupta.
Background reading material on timed automata: Timed Automata: Semantics, Algorithms, and Tools by Bengtsson/Yi.